Multiple pulse capacitor discharge ignition circuit

ABSTRACT

A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition system having an ignition coil and an ignition synchronizing means for defining ignition periods including: an ignition capacitor; a high speed charging circuit for rapidly charging the ignition capacitor; a switching circuit for closing a circuit between the ignition capacitor and the ignition coil; a clock circuit for producing high speed switching signals for operating the switching circuit; and a clock control circuit responsive to the ignition synchronizing means for enabling delivery of the switching signals to the switching circuit during ignition periods to provide a plurality of current discharges from the ignition capacitor through the ignition coil.

[ 51 Aug. 12, 1975 Primary Examiner-Charles J. Myhre Assistant ExaminerRonald B. Cox Attorney, Agent, or Firm-James H. Grover [57] ABSTRACT A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition system having an ignition coil and an ignition synchronizing means for defining ignition periods including: an ignition capacitor; a high speed charging circuit for rapidly charging the ignition capacitor; a switching circuit for closing a circuit between the ignition capacitor and the ignition coil; a clock circuit for producing high speed switching signals for operating the switching circuit; and a clock control circuit responsive to the igni- Umted States Patent [1 1 Lefevre MULTIPLE PULSE CAPACITOR DISCHARGE IGNITION CIRCUIT Robert P. Lefevre, 800 Ocean Blvd., Rye, NH. 03870 Jan. 30, 1973 Appl. N0.: 327,939

123/148 CB; 315/209 CD Int. F02p 1/00 Field of Search........ 123/148 E, 148 C, 148 D; 315/209 CD References Cited UNITED STATES PATENTS [76] Inventor:

[22] Filed:

.vL. h .1. nm m 0 m e w m a emm rm cw II S mmfo m or gC h u M .m y .W V l nm F m $8M. 8 n.m mc n e la m fi f C pp 0 a m f a SS n D n 0 2 a m a mvm m om .I i h .mk e C u amm 4 mm m 1 m m 3mm fl Wfi C. EEEEEEE 00888888 4444444 HHHHHHH 3333333 UUHHDDU Posey Wwem m nm e r "C es S 1 a hv SUO 0 .BDNWPS 0009 23 7776777 1 9999999 1111.111 7292 2 1 1 9893065 28 3 32 90566600 824923 ,5 ,5 1 3333333 PATENTED AUG 1 2 i915 JOEPZOO MULTIPLE PULSE CAPACITOR DISCHARGE IGNITION CIRCUIT FIELD OF INVENTION BACKGROUND OF INVENTION More efficient engine operation and less exhaust pollution can be obtained by increasing the spark surface exposure to the fuel-air mixture in the cylinders. One method of increasing that exposure is to increase the duration of the spark to allow for initial fuel burning plus further burning to complete combustion of the fuel-air mixture and of combustion by-products. However, any increase of the spark duration produces a disproportionately great increase in spark plug erosion due in part to the heating of the electrode. At lowest engine speed when the ignition period for each spark plug can be effectively longer and when the mixture is at its richest the spark would have to be extended for the greatest duration with the greatest harm to the electrode if a long continuous spark were used.

SUMMARY OF INVENTION It is therefore an object of this invention to provide a multiple pulse capacitor discharge circuit capable of providing a plurality of discrete independent ignition pulses, thereby effectively increasing spark duration a circuit which provides blanking of any spurious signals due to point bouncing.

It is a further object of this invention to provide such a circuit which provides ignition pulses beyond the ignition period at high engine speeds.

This invention results from the realization that increased spark exposure to the fuel-air mixture can be achieved without overheating or damaging the electrode by providing a plurality of discrete, independent, pulses.

The invention features a multiple pulse capacitor discharge circuit adapted for use with an engine ignition system having an ignition coil and ignition synchronizing means for defining ignition periods including an ignition capacitor and a high speed charging circuit for rapidly charging the ignition capacitor. A switching circuit closes the circuit between the ignition capacitor and the ignition coil and a clock circuit produces discrete, independent, high speed switching signals for operating the switching circuit. A clock control circuit responsive to the ignition synchronizing means enables delivery of the switching signals to the switching circuit during ignition periods to provide a plurality of current discharges from the ignition capacitor through the igni tion coil.

DISCLOSURE OF PREFERRED EMBODIMENT Other objects, features and advantages will occur from the following description of a preferred embodiment and the accompanying drawings, in which:

FIG. 1 is a schematic, block diagram of a multiple pulse capacitor discharge ignition circuit according to this invention; and

FIG. 2 is a more detailed schematic, diagram illustrating one specific embodiment of the circuit of this invention.

There is shown in FIG. 1 a multiple pulse capacitor discharge circuit 10 according to this invention including a power supply 12 for charging ignition capacitor 14 which is in series with ignition coil 16. Switching circuit 18 is closed to complete the series circuit between the ignition capacitor 14 and the ignition coil 16 and ignition capacitor 14 through coil 16 by a signal from trigger circuit 20 at the beginning of each ignition period defined by the ignition synchronizing means 22. Ignition synchronizing means 22 may be breaker points, a magnetic trigger, or other similar ignition timing means. In the most common case breaker points are used and the opening of the breaker points defines the beginning of the ignition period. An ignition period is the period from one opening of the breaker points to the next opening of the breaker points. Simultaneously with the delivery of a signal to trigger circuit 20, synchronizing means 22 delivers a signal to clock control circuit 24 which enables clock 26 to send a series of trigger pulses to switching circuit 18 following the initial pulse which that circuit receives from trigger circuit 20. A pulse amplifier and shaping circuit 28 as shown in phantom may be provided to improve the signals provided by clock circuit 26 before they are submitted to switching circuit 18. Clock control circuit 24 may be arranged with respect to clock circuit 26 such that clock circuit 26 operates continually but its output is only permitted to reach switching circuit 18 during ignition periods under the supervision of clock control 24. Alternatively, clock circuit 26 may be in the off condition until clock control 24 turns it on to begin providing signals to switching circuit 18.

A blanking circuit 30 may be provided to prevent a second triggering of switching circuit 18 in the sam ignition period by trigger circuit 20 induced to act my a false signal from the ignition synchronizing means 22. Such false signals may originate, for example, when breaker points are the synchronizing means by the occurrence known as point-bounce: the impact of the points going from the open to the closed condition may cause the points to bounce open a second time and give a false indication to trigger circuit 20 causing it to refire switch 18. Blanking circuit 30 prevents any signal from synchronizing means 22 from inadvertantly operating trigger circuit 20 following its initial operation. Power supply 12 should have a high continuous output for rapidly recharging ignition capacitor 14 a number of times during each ignition cycle in order to fully realize the multiple pulse capabilities provided by the subsequent triggering signals delivered to switching circuit 18 by clock circuit 26.

In one specific embodiment, FIG. 2, power supply 12 may include an astable multi-vibrator 32 including transistors 34 and 36, resistors 38, 40, 42 and 44 and capacitors 46 and 48. The multi-vibrator 32 drives a power inverter switching circuit including transistors S and 52 which are connected in series with the primary 54 of transformer 56. A positive 12 volt level is supplied to the center tap 58 of primary 54 and to multi-vibrator 32 via line 60 from bus 62 which is connected to the positive side of a 12 volt battery 64 whose negative side is grounded. A filtering of the power supply may be provided by capacitor 66. The secondary 68 of transformer 56 is connected across a full wave diode rectifier 70 including four diodes 72, 74, 76 and 78. The output of rectifier 70 is filtered by capacitor 80 before it is submitted to ignition capacitor 14; capacitor 80 also minimizes the dV/dt effect on SCR 103 before it is submitted to ignition capacitor 14. In astable multivibrator 32 transistors 34 and 36 may be 2N697s, resistors 38, 40, 42 and 44 may be 4700, 33K, 33k0, and 4700, respectively, and capacitors 46 and 48 may be 0.01 uf and 0.01 pif, respectively. Inverter transistors 50 and 52 may be 2N5496s and diodes 72, 74, 76 and 78 may be 1N4936s. Capacitors 66 and 80 may be 50 p.f and 0.01 pf, respectively. In operation multivibrator 32 may produce a signal of approximately 10,000 cycles per second which after transformation and rectification provide a charging current to ignition capacitor 14 which is approximately 400 volts. In this embodiment'power supply 12 has a low input requirement but a high continuous output power which can recharge ignition capacitor 14 in one-tenth of a millisecond or less.

Trigger circuit 20 includes a pair of resistors 82, 84 which are connected between 12 volt bus 62 and either end of capacitor 86. Ignition synchronizing means or points 22 are connected to capacitor 86 at junction 88. The other end of capacitor 86 is connected to the base of transistor 90. Diode 92 connected electrically to junction 88 is connected in series with capacitor 94 and the base of transistor 96. A resistor 98 interconnects the collector of transistor 90 with the cathode of diode 92 and capacitor 94 with resistor 100 connects the base of transistor 96 to ground. The collector of transistor 96 is connected to the 12 volt bus 62 by resistor 102. Transistor 90 and 96 are 2N3708s; diode 92 is a D4; resistors 82, 84, 98, 100 and 102 are 500, 68k0, 1000, lk0, and 6800, respectively, and capacitors 86 and 94 are 0.02uf and 0.22uf, respectively. Switching circuit 18 includes an SCR 103 which has its gate 104 connected to the emitter of transistors 96, its cathode connected to ground and its anode connected to one side of ignition capacitor 14.

Pulse amplifier circuit 28 may include a pair of transistors 106, 108 connected to obtain current multiplication with the emitter of transistor 108 connected to the gate of SCR 103, and to ground through resistor 110. The collectors of transistors 106 and 108 may be connected to the +12 volt bus 62 by resistors 1 l2 and 114. SCR 103 may be a 2N3525, transistors 106 and 108 may be 2N3708s and resistors 110, 112 and 114 may be 1000, 4700and 1000, respectively.

' Clock circuit 26 includes transistor 118 with its load electrodes connected to ground and +12 volts through resistors 120 and 122, respectively. The gate electrode of transistor 1 18 is connected to the +12 volt bus 62 by resistor 124 and to ground through capacitor 126. Transistor 118 may be a uni-junction transistor 2N4626; resistors 120, 122 and 124 may be 1000, 8200, 40K0, respectively, and capacitor 126 may be 0.1;Lf.

Clock control circuit 24 may include a transistor 128 having its collector connected directly to the gate of transistor 1 18 and its emitter connected to ground. The base of transistor 128 is connected to the points 22 through capacitor 130 and to +12 volt bus 62 through resistor 132. Transistor 128 may be a 2N3708, resistor 132 may be 681(0 and capacitor 130 0.2;Lf. An alternative clock control circuit at 24, shown in phantom, may include a diode 134 with its anode connected to the gate of transistor 1 18 and its cathode connected to junction 88 interconnected with points 22. Diode 134 may be 10D4.

In power supply 12 with transistor 34 conducting, current is supplied to transistor 50 which will in turn be driven into saturation. In this condition the base of transistor 34 is at approximately +1.4 volts and transistor 34 will remain in conduction by charging current flowing through capacitor 48 and resistor 44. Transistors 34 and 50 remain conducting until the charging current through resistor 44, capacitor 48 and transistors 34 and 50 falls below the level required to maintain transistor 34 conducting. Transistor 34 will then abruptly shut off causing transistor 50 to do the same. With transistor 34 cut off and its collector abruptly rising to the supply potential, charging current is supplied to the base of transistor 36 through capacitor 46 and resistor 38. The charging current to capacitor 46 turns on transistor 36 and thus transistor 52. While capacitor 46is charging, capacitor 48 is discharging through resistor 42 and base emitter junction of transistor 52 and the collector emitter junction of transistor 36. When the charging current through resistor 38 and capacitor 46-decreases sufficiently transistor 36 will be cut off in turn cutting off transistor 52 and causing transistor 50 once again to turn on. Multivibrator circuit 32 will continue operation in this manner at approximately 10,000 cycles per second, switching transistors 50 and 52 at a frequency of approximately 10,000 cycles per second. After transformation by transformer 56, the current is rectified by rectifier 70 and available for charging ignition capacitor 14.

With ignition capacitor 14 fully charged and points 22 closed transistors and 128 are conducting and transistors 96, 106, 108, 118 and SCR 103 are not conducting. Capacitors 86 and 94 are discharged. When points 22 open capacitor 86 charges rapidly through resistor 82 and the base to emitter circuit of conducting transistor 90 producing a negative pulse at the base of transistor 90 which drives transistor 90 into cutoff and holds it there. Simultaneously, when the transistor 90 is cut off capacitor 94 is provided with a charging current through resistor 82 and diode 92 in series with the parallel combination of resistor and the base to emitter junction of transistor 96 and resistor 110. Transistor 96 conducts briefly producing a positive pulse across resistor until capacitor 94 has had time to charge to the supply potential and turn off transistor 96. The positive pulse triggers SCR 103 into conduction thus placing the ignition capacitor 14 directly in parallel with the primary of ignition coil 16 which produces, through transformer action, approximately 40,000 volts to fire the spark plugs. When ignition capacitor has fully discharged the collapsing magnetic field produces a negative potential at the anode of SCR 103 commutating the SCR into cutoff. A delay of approximately two micro-seconds is inherent with this network. However, the sharp discharge voltage rise time of ignition capacitor 14 more than compensates for this propagation pulse delay.

The opening of points 22 which initiated the action of trigger circuit also produced action in clock control circuit 24. The positive pulse presented at junction 88 provided a negative pulse to capacitor 130 at the base of conducting transistor 128 which cut off transistor 128 and removed a low shunt path from across capacitor 126 in clock circuit 26. With the low impedance path removed capacitor 126 now charges through resistor 124 until the emitter or gate of transistor 118 is brought to a level at which transistor 118 will fire and discharge capacitor 126 through resistor 120. Following this transistor 118 immediately cuts off and capacitor 126 begins to charge again. In the meantime the pulse provided by the discharge through resistor 120 is transmitted through transistors 106 and 108 in amplifier 28 to the gate 104 of SCR 103. This pulse at gate 104 fires SCR 103 and once again discharges ignition capacitor 14 through coil 16. During the interval between the initial firing of SCR 103 in response to the signal from trigger circuit 20 derived directly from the opening of points 22 and the occurrence of this first pulse from clock circuit 26 approximately 300 microseconds have elapsed. In that time ignition capacitor 14 has had ample time to fully charge to its maximum capacity so that coil 16 and the corresponding spark plug get a second complete firing in the same ignition period. Clock circuit 26 will continue to provide pulses every 250 microseconds following the first pulse until the points once again close. The first signal from clock circuit 26 took 300 microseconds instead of the 250 microseconds because of the inherent delay through clock control circuit 24 and clock circuit 26. Thus a typical V8 engine operating at 500 RPM instead of the typical, conventional one spark per spark plug per cycle will get seven sparks per spark plug per cycle, an increase which substantially extends the exposure time of the spark and the efficiency of operation without adversely affecting electrode wear and electrode life.

Subsequently when points 22 close, capacitor 130 rapidly discharges to ground through points 22 and then slowly begins to recharge through resistor 132 at a rate determined by the RC constant of capacitor 130 and resistor 132. Thus transistor 128 remains cut off for a period of time following the closing of the points, the length of time being determined by the RC constant of resistor 132 and capacitor 130. During this delay, capacitor 126 is free to continue its recharging and discharging to keep clock circuit 26 operational and to provide pulses for SCR 103 even after the defined ignition period has ended. This feature has been added to permit one or more clock pulses to be generated during high speed operation of the engine when the duration of the ignition period is so small that clock circuit 26 may be unable to produce multiple discharges of ignition capacitor 14. If this delay feature is unnecessary or undesirable a simpler clock control circuit 24' consisting of diode 134 may be used to shunt capacitor 126. Diode 134 provides a low impedance path to ground for current from resistor 124 when points 22 are closed. However, when points 22 are open diode 134 is no longer connected to ground and the charging current from resistor 124 may begin to charge capacitor 126.

Blanking circuit 30, FIG. 1, is not independently shown in FIG. 2 because it is incorporated into trigger circuit 20 and uses most of the same elements as trigger circuit 20 to perform its function. The primary ele ments of point bounce blanking circuit 30 are capacitors 86 and 94 which introduce delays into the operation of trigger circuit 20 that prevent it from firing in the first few hundred microseconds: it is in the first two to three hundred microseconds following the closure of points 22 when point bounce is most likely to occur. Upon the closing of points 22 capacitors 86 and 94 are still fully charged thus an immediate opening of points 22 due to bouncing would produce a signal at junction 88 which would have no effect on transistor 90 ie transistor 90 remains cut off because capacitor 86 prevents propagation of the pulse from junction 88 to the base of transistor 90. Similarly capacitor 94 is fully charged and would prevent any pulse capable of firing transistor 96 from reaching the base of that transistor. After a predetermined period of time determined by the RC constant of capacitor 86 and resistor 84 capacitor 86 will be fully charged with the opposite polarity. At this point the bias on the base of transistor 90 provided by resistor 84 will be sufficient to once again drive transistor 90 to conduct. With the conduction of transistor 90 a discharge path is provided for capacitor 94 through resistors 98 and 100 and it now discharges in the period of time determined by the RC constant of resistors 98 and 100 and capacitor 86 will discharge in approximately 600 microseconds and capacitor 94 will discharge in approximately microseconds. Until that time no pulse appearing at junction 88 will be able to provide a trigger signal to the gate 104 of SCR 103.

Since the point bounce problem occurs within the first few hundred microseconds after point closure there is little danger that such a bouncing would trigger SCR 103.

Other embodiments will occur to those skilled in the art and are within the following claims:

What is claimed is:

1. A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition system having an ignition coil and ignition synchronizing means for defining ignition periods comprising:

an ignition capacitor;

a continuously operating, high speed charging circuit connected directly to the ignition capacitor for rap idly charging said ignition capacitor and continously supplying power for charging the ignition capacitor;

a switching circuit for closing a circuit through said ignition capacitor and said ignition coil;

a free running clock circuit for producing discrete, high speed switching signals independently of the charging circuit for operating said switching circuit; and

a clock control circuit connected between the synchronizing means and the clock circuit so as to isolate the clock circuit from the synchronizing means, the clock control circuit being responsive to said ignition synchronizing means to enable delivery of said switching signals to said switching circuit during ignition periods to provide a plurality of current discharges from said ignition capacitor through said ignition coil, the control circuit being further responsive to termination of each ignition period by the ignition synchronizing means to disenable delivery of switching signals from the clock circuit to the switching circuit.

2. The multiple pulse capacitor discharge ignition circuit of claim 1 further including a trigger circuit, re-

sponsive to an initial signal from said ignition synchronizing means, for operating said switching circuit at the beginning of each ignition period.

3. The multiple pulse capacitor discharge ignition circuit of claim 2 further including a blanking circuit for suppressing spurious signals from said ignition synchronizing means following said initial signal in each ignition period to prevent firing of said switching circuit by any signals from said synchronizing means other than said initial signal.

4. The multiple pulse capacitor discharge ignition circuit of claim 1 in which said clock circuit includes a first semiconductor device and a timing capacitor connected to a control electrode of said first device for alternately charging to a level to fire said first device and discharging through said fired device.

5. The multiple pulse capacitor discharge ignition circuit of claim 4 in which said clock control circuit includes a second semiconductor device for providing a bias at a control electrode of said second device to cause it to conduct and means responsive to said synchronizing means, for decreasing the bias and turning off said second device during an ignition period.

6. The multiple pulse capacitor discharge ignition circuit of claim 5 in which said means for providing a bias includes a second timing capacitor for delaying for a predetermined interval the establishment of said bias on said second device.

7. The multiple pulse capacitor discharge ignition circuit of claim 1 further including a pulse amplifier circuit including a semiconductor device for amplifying said switching signals, and an additional semiconductor responsive to said amplified switching signals from said third semiconductor device for gating said switching circuit.

8. The multiple pulse capacitor discharge ignition circuit of claim 2 in which said trigger circuit includes a gating semiconductor device for producing a gating input to said switching circuit and a further semiconductor device for inhibiting said gating semiconductor from providing said gating input and removing that inhibition in response to a said initial signal from said synchronizing means.

9. The multiple pulse capacitor discharge ignition circuit of claim 3 in which said trigger circuit includes a gating semiconductor device for producing a gating input to said switching circuit and a further semiconductor device for inhibiting said gating semiconductor from providing said gating input and removing that inhibition in response to said initial signal from said synchronizing means, said blanking circuit including a first delay capacitor connected to a control electrode of said further semiconductor device for communicating said initial signal to said further semiconductor device for operating said further semiconductor device to remove the inhibition from said gating semiconductor device, and subsequently charging to prevent propagation of additional signals to operate said further semiconductor device and first discharge means for discharging said first delay capacitor over a first predetermined period of time, and a second delay capacitor connected to a control electrode of said gating semiconductor device for propagating said initial signal to said gating semiconductor device for operating said gating semiconductor device in the absence of an inhibition, and subsequently charging to prevent propagation of additional signals to operate said gating semiconductor device, and second discharge means for discharging said second delay capacitor over a second predetermined period of time.

10. The multiple pulse capacitor discharge ignition circuit of claim 1 in which said charging circuit includes an astable multivibrator operating at a frequency above the frequency of said clock circuit, a power inverter responsive to said multivibrator, a high frequency step-up transformer and a rectifier responsive to said transformer.

11. The multiple pulse capacitor discharge ignition circuit of claim 10 in which said multivibrator operates at approximately 10 KHz and said clock circuit at approximately 4 KHz.

12. A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition circuit having an ignition coil and ignition synchronizing means for defining ignition periods comprising:

an ignition capacitor;

a continuously operating, high speed charging circuit connected directly to the ignition capacitor for rapidly charging said ignition capacitor and continuously supplying power for charging the ignition capacitor',

a switching circuit for closing a circuit through said ignition capacitor and said ignition coil;

a trigger circuit having an input for direct connection to the ignition synchronizing means and responsive to an initial signal from said ignition synchronizing means, for operating said switching circuit at the beginning of each ignition period to provide an initial ignition pulse;

a free running clock circuit for producing high speed switching signals for operating said switching circuit during each ignition period subsequent to operation by said trigger circuit independently of the charging circuit and trigger circuit; and

a clock control circuit connected between the synchronizing means and the clock circuit so as to isolate the clock circuit from the synchronizing means, the clock control circuit being responsive to said ignition synchronizing means for enabling delivery of said switching signals to said switching circuit during ignition periods to provide a plurality of current discharges from said ignition capacitor through said ignition coil, the control circuit being further responsive to termination of each ignition period by the ignition synchronizing means to disenable delivery of switching signals from the clock circuit to the switching circuit.

13. A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition circuit having an ignition coil and ignition synchronizing means for defining ignition periods comprising:

an ignition capacitor; 7

a continuously operating, high speed charging circuit connected directly to the ignition capacitor for rapidly charging said ignition capacitor and continuously charging the ignition capacitor;

a switching circuit for closing a circuit through said ignition capacitor and said ignition coil;

a trigger circuit having an input for direct connection to the ignition synchronizing means and responsive to an initial signal from said ignition synchronizing means, for operating said switching circuit at the beginning of each ignition period to provide an initial ignition pulse;

a blanking circuit for suppressing spurious signals from said ignition synchronizing means following said initial signal in each ignition period to prevent firing of said switching circuit by any signals from said synchronizing means other than said initial signai;

a free running clock circuit for producing high speed switching signals for operating said switching circuit during each ignition period subsequent to operation by said trigger circuit independently of the charging circuit and trigger circuit; and

a clock control circuit connected between the synchronizing means and the clock circuit so as to isolate the clock circuit from the synchronizing means, the clock control circuit being responsive to said ignition synchronizing means, for enabling delivery of said switching signals to said switching circuit during ignition periods to provide a plurality of current discharges from said ignition capacitor through said ignition coil, the control circuit being further responsive to termination of each ignition period by the ignition synchronizing means to disenable delivery of switching signals from the clock circuit to the switching circuit. 14. The multiple pulse capacitor discharge ignition circuit of claim 2 further including an OR gate connected to the clock circuit and the trigger circuit for isolating the clock circuit from the trigger circuit. 

1. A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition system having an ignition coil and ignition synchronizing means for defining ignition periods comprising: an ignition capacitor; a continuously operating, high speed charging circuit connected directly to the ignition capacitor for rapidly charging said ignition capacitor and continously supplying power for charging the ignition capacitor; a switching circuit for closing a circuit through said ignition capacitor and said ignition coil; a free running clock circuit for producing discrete, high speed switching signals independently of the charging circuit for operating said switching circuit; and a clock control circuit connected between the synchronizing means and the clock circuit so as to isolate the clock circuit from the synchronizing means, the clock control circuit being responsive to said ignition synchronizing means to enable delivery of said switching signals to said switching circuit during ignition periods to provide a plurality of current discharges from said ignition capacitor through said ignition coil, the control circuit being further responsive to termination of each ignition period by the ignition synchronizing means to disenable delivery of switching signals from the clock circuit to the switching circuit.
 2. The multiple pulse capacitor discharge ignition circuit of claim 1 further including a trigger circuit, responsive to an initial signal from said ignition synchronizing means, for operating said switching circuit at the beginning of each ignition period.
 3. The multiple pulse capacitor discharge ignition circuit of claim 2 further including a blanking circuit for suppressing spurious signals from said ignition synchronizing means following said initial signal in each ignition period to prevent firing of said switching circuit by any signals from said synchronizing means other than said initial signal.
 4. The multiple pulse capacitor discharge ignition circuit of claim 1 in which said clock circuit includes a first semiconductor device and a timing capacitor connected to a control electrode of said first device for alternately charging to a level to fire said first device and discharging through said fired device.
 5. The multiple pulse capacitor discharge ignition circuit of claim 4 in which said clock control circuit includes a second semiconductor device for providing a bias at a control electrode of said second device to cause it to conduct and means responsive to said synchronizing means, for decreasing the bias and turning off said second device during an ignition period.
 6. The multiple pulse capacitor discharge ignition circuit of claim 5 in which said means for providing a bias includes a second timing capacitor for delaying for a predetermined interval the establishment of said bias on said second device.
 7. The multiple pulse capacitor discharge ignition circuit of claim 1 further including a pulse amplifier circuit including a semiconductor device for amplifying said switching signals, and an additional semiconductor responsive to said amplified switching signals from said third semiconductor device for gating said switching circuit.
 8. The multiple pulse capacitor discharge ignitiOn circuit of claim 2 in which said trigger circuit includes a gating semiconductor device for producing a gating input to said switching circuit and a further semiconductor device for inhibiting said gating semiconductor from providing said gating input and removing that inhibition in response to a said initial signal from said synchronizing means.
 9. The multiple pulse capacitor discharge ignition circuit of claim 3 in which said trigger circuit includes a gating semiconductor device for producing a gating input to said switching circuit and a further semiconductor device for inhibiting said gating semiconductor from providing said gating input and removing that inhibition in response to said initial signal from said synchronizing means, said blanking circuit including a first delay capacitor connected to a control electrode of said further semiconductor device for communicating said initial signal to said further semiconductor device for operating said further semiconductor device to remove the inhibition from said gating semiconductor device, and subsequently charging to prevent propagation of additional signals to operate said further semiconductor device and first discharge means for discharging said first delay capacitor over a first predetermined period of time, and a second delay capacitor connected to a control electrode of said gating semiconductor device for propagating said initial signal to said gating semiconductor device for operating said gating semiconductor device in the absence of an inhibition, and subsequently charging to prevent propagation of additional signals to operate said gating semiconductor device, and second discharge means for discharging said second delay capacitor over a second predetermined period of time.
 10. The multiple pulse capacitor discharge ignition circuit of claim 1 in which said charging circuit includes an astable multivibrator operating at a frequency above the frequency of said clock circuit, a power inverter responsive to said multivibrator, a high frequency step-up transformer and a rectifier responsive to said transformer.
 11. The multiple pulse capacitor discharge ignition circuit of claim 10 in which said multivibrator operates at approximately 10 KHz and said clock circuit at approximately 4 KHz.
 12. A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition circuit having an ignition coil and ignition synchronizing means for defining ignition periods comprising: an ignition capacitor; a continuously operating, high speed charging circuit connected directly to the ignition capacitor for rapidly charging said ignition capacitor and continuously supplying power for charging the ignition capacitor; a switching circuit for closing a circuit through said ignition capacitor and said ignition coil; a trigger circuit having an input for direct connection to the ignition synchronizing means and responsive to an initial signal from said ignition synchronizing means, for operating said switching circuit at the beginning of each ignition period to provide an initial ignition pulse; a free running clock circuit for producing high speed switching signals for operating said switching circuit during each ignition period subsequent to operation by said trigger circuit independently of the charging circuit and trigger circuit; and a clock control circuit connected between the synchronizing means and the clock circuit so as to isolate the clock circuit from the synchronizing means, the clock control circuit being responsive to said ignition synchronizing means for enabling delivery of said switching signals to said switching circuit during ignition periods to provide a plurality of current discharges from said ignition capacitor through said ignition coil, the control circuit being further responsive to termination of each ignition period by the ignition synchronizing means to disenable delivery of switching signals from the clock circuit to the Switching circuit.
 13. A multiple pulse capacitor discharge ignition circuit adapted for use with an engine ignition circuit having an ignition coil and ignition synchronizing means for defining ignition periods comprising: an ignition capacitor; a continuously operating, high speed charging circuit connected directly to the ignition capacitor for rapidly charging said ignition capacitor and continuously charging the ignition capacitor; a switching circuit for closing a circuit through said ignition capacitor and said ignition coil; a trigger circuit having an input for direct connection to the ignition synchronizing means and responsive to an initial signal from said ignition synchronizing means, for operating said switching circuit at the beginning of each ignition period to provide an initial ignition pulse; a blanking circuit for suppressing spurious signals from said ignition synchronizing means following said initial signal in each ignition period to prevent firing of said switching circuit by any signals from said synchronizing means other than said initial signal; a free running clock circuit for producing high speed switching signals for operating said switching circuit during each ignition period subsequent to operation by said trigger circuit independently of the charging circuit and trigger circuit; and a clock control circuit connected between the synchronizing means and the clock circuit so as to isolate the clock circuit from the synchronizing means, the clock control circuit being responsive to said ignition synchronizing means, for enabling delivery of said switching signals to said switching circuit during ignition periods to provide a plurality of current discharges from said ignition capacitor through said ignition coil, the control circuit being further responsive to termination of each ignition period by the ignition synchronizing means to disenable delivery of switching signals from the clock circuit to the switching circuit.
 14. The multiple pulse capacitor discharge ignition circuit of claim 2 further including an OR gate connected to the clock circuit and the trigger circuit for isolating the clock circuit from the trigger circuit. 